The present invention relates to a method and an apparatus for controlling a power converter valve having at least two turn-off, non-latching power semiconductor switches which are electrically connected in series and each have an active collector-emitter limiting circuit.
Turn-off, non-latching power semiconductor switches include, for example, Insulated Gate Bipolar Transistor (IGBT), bipolar Power Transistors (PTR), Metal Oxide Semiconductor Field Effect Transistor (MOSFFT) or Hard Driven Gate Off Thyristor (HD GTO). In contrast to the latching power semiconductor switches, for example, Gate Turn Off thyristor (GTO), MOS Control Thyristor (MCT) or thyristors, the non-latching power semiconductor switches constantly require a drive signal in order to remain reliably switched on or off. Only the IGBT will be described below as non-latching power semiconductor switch. However, the description is in no way intended to be restrictive.
Conventional IGBT components (modules) can be used to realize power converters in the MV range without modules being connected in parallel. If the voltage range and/or the power range of a power converter of this type-is intended to be increased, then it is appropriate to connect in series a plurality of IGBT modules per power converter valve. A power converter circuit of this type is referred to as a power converter having a series connection number of Two or more.
FIG. 1 illustrates a basic circuit diagram of a power converter having three series connections of one phase of a polyphase power converter. This bridge circuit has three upper and three lower power semiconductor switches T1o, T2o, T3o and T1u, T2u, T3u which are electrically connected in series. The junction points between the upper and lower power semiconductor switches T1o, T2o, T3o and T1u, T2u, T3u form a phase terminal 2. On the input side, this phase power converter is linked to an intermediate circuit capacitor C which stabilizes the intermediate circuit DC voltage Ud. An RC snubber, which includes a capacitor C1 and a resistor R1 and a balancing resistor R2, is electrically connected in parallel with each power semiconductor switch T1o, T2o, T3o and T1u, T2u, T3u. Each power semiconductor switch T1o, T2o, T3o and T1u, T2u, T3u has a control apparatus, of which only a driver stage 4 with a gate resistor Rg connected downstream is illustrated here for reasons of clarity. Each of these apparatuses also has an active collector-emitter limiting circuit. A phase power converter of this type is described in the publication entitled xe2x80x9cHigh Power IGBT Converters with new Gate Drive and Protection Circuitxe2x80x9d, printed in EPExe2x80x295, pages 1.066 to 1.070.
The RC snubber in each case minimizes the effect of nonlinear depletion-layer capacitances of the IGBT with internal inverse diode. Uniform static voltage sharing is achieved using the balancing resistors R2. The active collector-emitter limiting circuits of each stage limit the maximum voltage for each IGBT module T1o, T2o, T3o, T1u, T2u, T3u below the permissible blocking voltage.
In contrast to the power converter having the series connection number of One, in the case of a power converter having at least two series connections, the possible voltage potentials of the individual semiconductor switches are not fixedly predetermined a priori.
FIG. 2 illustrates, by way of example, voltage profiles of the collector-emitter voltages UCE1, UCE2, UCE3, for example of the power semiconductor switches T1o, T2o, T3o, during the phases xe2x80x9cswitch-onxe2x80x9d P1, xe2x80x9con statexe2x80x9d P2, xe2x80x9cswitch-offxe2x80x9d P3 and xe2x80x9coff statexe2x80x9d P4, against the time t.
During the switch-on and -off phases P1 and P3, respectively (as shown in FIG. 3 and FIG. 4, respectively), primarily semiconductor-inherent properties such as, e.g., differences with regard to storage charge and depletion-layer capacitance, different delays and switch-on and off times determine the voltage distribution, but differences in driving as a result of tolerance, jitter- and drift-encumbered signal propagation times and also properties in the load circuit (control inductances, stray and ground capacitances and additional snubbers) also have a non-negligible influence. As shown in FIG. 3, an instant t1 is marked which demonstrates the appearance of the voltage distribution on the series connected power semiconductor switches T1o, T2o, T3o during the switch-on phase P1 at this instant t. This diagram shown in FIG. 3 illustrates that the power semiconductor switch T1 o takes up the greatest part of the reverse voltage.
During the off-state phase P4 (shown in FIG. 4), the voltage sharing is not stable but rather depends on the preceding switch-off operation, the turned-off current and on the magnitude, tolerance and drift of the leakage current and also on a snubber. After a period of time which depends on the depletion-layer and snubber capacitances, the leakage currents lead to a non-uniform steady-state voltage sharing in which, in the worst-case situation, a single power semiconductor switch has to take up the entire reverse voltage. The instant t4 shown in FIG. 4 illustrates a moment of a voltage distribution in the switched-off state (phase P4).
European Patent No. 0 653 830 describes a method and apparatus for driving a power converter having three series connections, with which the problems evinced are solved. With this conventional method, the collector-emitter voltages of the turn-off, non-latching power semiconductor switches which are electrically connected in series, and the total voltage present across the series circuit are measured. From an n-th part of the total voltage and a respective collector-emitter voltage, a respective differential voltage is determined, from which switch-on and switch-off times are then calculated. Using a delay circuit and these switch-on and switch-off times, the time switching points of a control signal that is provided are determined for each power semiconductor switch of the series circuit. The switch-on and switch-off times and the switching instants of a control signal are calculated in such a way that all the power semiconductor switches of the series circuit are loaded identically, in voltage terms. In the switched-off state of the power semiconductor switches which are electrically connected in series, the magnitude of the individual control signals is in each case calculated from the measured collector-emitter voltages, with the aid of an n-th part of the total voltage, in such a way that an identical voltage loading results in the off state for all of the switches. These calculated switching instants are implemented only during the subsequent switching operation.
European Patent Application No. 0 666 647 describes a method and circuit arrangement for driving semiconductor switches of a series circuit, each semiconductor switch being assigned a voltage limiting apparatus. Using this known method, the power loss of each voltage limiting apparatus is detected by a regulating device for evening out the voltage sharing over the semiconductors. The regulating device generates modified control pulses for each semiconductor switch from a common control pulse on the basis of the detected power losses of the voltage linking apparatuses. As a result, the power loss of the voltage limiting apparatuses is regulated to a minimum. This European published patent application specifies an embodiment in which an RCD snubber, balancing resistors and short-circuit elements are electrically connected in parallel with each semiconductor switch. The RCD snubber protects the IGBT module against overvoltage sparks during the turn-off of the load current. The balancing resistors provide for steady-state voltage sharing and the short-circuit elements, for example avalanche diodes or varistors, take over the current flow if the modules fail and the module voltage exceeds the response threshold of the voltage limiting apparatus and the higher response threshold of the short-circuit elements.
In both of the conventional methods, balanced voltage sharing is achieved by shifting switching instants of a control signal that is provided. This balancing of the voltage sharing in the case of a turn-off power converter valve having at least two series connections is effected statically and not dynamically since a discrete-time method is involved, e.g., the switching times are calculated from the measured actual values in a switching operation, and said switching times are only implemented in the subsequent switching operation. Consequently, an operating state that has already occurred is subsequently altered in a stepwise manner.
The present invention is based on the object of specifying a method and an apparatus for controlling a power converter valve having at least two turn-off, non-latching power semiconductor switches which are electrically connected in series, with which it is possible to achieve dynamic balancing of the voltage sharing in the power converter valve.
By virtue of the fact that when a rising edge of a drive signal is received, a changeover is made from a predetermined value of a reference limiter voltage to a lower value, the effect achieved is that the voltages of the individual power semiconductor switches which are electrically connected in series are balanced using the switch-on command to a range which guarantees that the switch-on energy losses are evened out. During the turn-off operation, the value of the reference voltage is increased again to the predetermined value in order that these power semiconductor switches are protected, in the switched-off state, against voltage spikes from a supply network.
The configuration of the apparatus according to the present invention for controlling a series circuit comprising a plurality of turn-off, non-latching power semiconductor switches is dependent on the configuration of the active collector-emitter limiting circuit used.
If a clamping snubber having at least two transit diodes is used as the collector-emitter limiting circuit, then at least one transilt diode can be bridged by means of a switch. The switch is closed in a manner dependent on the rising edge. If a differential amplifier with a reference voltage source is used as the active collector-emitter limiting device, then a second reference voltage source is used, which can be connected to the reference input of the differential amplifier by means of a changeover switch. The changeover switch is actuated in a manner dependent on the rising edge of a drive signal that is provided. The second reference voltage source supplies a reference limiter voltage having a lower value.
Another advantageous possibility according to the present invention is that when a differential amplifier with a reference voltage source is used, provision is made of a controllable current source which can be linked on the output side to an actual value input of the differential amplifier. In a manner dependent on the rising edge of a drive signal that is provided, the controllable current source is connected on the output side to the actual value input of the differential amplifier. As a result, the actual value of the collector-emitter voltage is processed in such a way that a differential value is determined which is equal to a differential value of an unchanged actual value and a reduced value of a reference limiter voltage.
With these three above-described apparatuses for controlling a series circuit comprising a plurality of power semiconductor switches, the voltages of the individual power semiconductor switches are balanced by means of the switch-on command immediately rather than first during the subsequent switching operation. This is also achieved without a high outlay. Moreover, it is possible to modify any commercially available drive device which has one of the three aforementioned embodiments of an active collector-emitter limiter circuit according to the present invention.
In an advantageous method of the present invention, in the switched-off state after a predetermined time interval after the ending of the turn-off operation, the predetermined reference limiter voltage is cyclically decreased by a predetermined value for a predetermined time interval. As a result, an unbalanced voltage sharing that has arisen on account of different reverse currents and/or different tail currents is balanced.
In other words, the static balancing is likewise effected actively via the driving method. Consequently, it is possible to dispense with the balancing resistors.
In a further advantageous embodiment of the method according to the present invention, in the switched-off state after a predetermined time interval after the ending of the turn-off operation, a determined gate-emitter voltage is compared with a predetermined gate-emitter reference voltage in such a way that when the gate-emitter reference voltage is exceeded, the predetermined value of the reference limiter voltage is decreased by a predetermined value. The static balancing is likewise achieved actively by means of this further advantageous method.
The cyclic method is a prophylactic measure in order to achieve static balancing in the switched-off state. The advantageous further method takes effect only when unbalancing occurs, which can be determined by means of the gate-emitter voltage. Consequently, the value of the predetermined reference limiter voltage is decreased when and only when erroneous distribution of voltage occurs.
In a yet further advantageous embodiment of the method according to the present invention, the cyclic redaction of the value of the reference limiter voltage in the case of a series circuit comprising a plurality of power semiconductor switches is carried out in a manner staggered over time from switch to switch. This staggering over time prevents the blocking capability of the series circuit from being significantly reduced.